| PART |
Description |
Maker |
| 74F109 I74F109D I74F109N N74F109D N74F109N 74F109_ |
Positive J-K positive edge-triggered flip-flops F/FAST SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16
From old datasheet system
Positive J-Knot positive edge-triggered flip-flops
|
NXP Semiconductors N.V.
PHILIPS[Philips Semiconductors]
|
| 74ALS109AN 74ALS109A 74ALS109AD |
Dual J-K positive edge-triggered flip-flop with set and reset ALS SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16
|
Rochester Electronics, LLC
PHILIPS[Philips Semiconductors]
NXP Semiconductors
|
| IDT74LVC74A IDT74LVC74APY8 IDT74LVC74ADC8 IDT74LVC |
3.3V CMOS Dual POSITIVE-Edge-Triggered D-Type Flip-Flop with Clear and Preset, 5.0V Tolerant I/O
|
IDT
|
| M27W201-80K6TR M27W201-200NZ6TR M27W201-80NZ6TR M2 |
2 MBIT (256KB X8) LOW VOLTAGE OTP EPROM
Test Spring Probe; Current Rating:3A; Leaded Process Compatible:Yes; Length:0.060"; Peak Reflow Compatible (260 C):No; Tip/Nozzle Style:90 Concave RoHS Compliant: Yes 2兆位56Kb × 8低压紫外线可擦写可编程只读存储器和OTP存储
Triple 3-Input Positive-AND Gates 14-SO 0 to 70
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 16-SO 0 to 70
Triple 3-Input Positive-AND Gates 14-PDIP 0 to 70
Triple 3-Input Positive-AND Gates 14-SOIC 0 to 70
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 16-SOIC 0 to 70
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 16-PDIP 0 to 70
2 Mbit 256Kb x 8 Low Voltage UV EPROM and OTP EPROM
2 MBIT (256KB X8) LOW VOLTAGE OTP EPROM
|
STMicroelectronics N.V.
意法半导
STMICROELECTRONICS[STMicroelectronics]
ST Microelectronics
|
| MAX685 MAX685EEE |
Dual-Output Positive and Negative / DC-DC Converter for CCD and LCD
Dual D-type Positive-Edge-Triggered Flip-Flops With Preset And Clear 14-CFP -55 to 125
Dual-Output Positive and Negative, DC-DC Converter for CCD and LCD
|
Maxim Integrated Products, Inc.
MAXIM[Maxim Integrated Products]
|
| AS7C1026B AS7C1026B-20TIN AS7C1026B-10JC AS7C1026B |
High Speed CMOS Logic Triple 3-Input AND Gates 14-SOIC -55 to 125 64K X 16 STANDARD SRAM, 20 ns, PDSO44
5 V 64K X 16 CMOS SRAM 54K的16 CMOS SRAM
5 V 64K X 16 CMOS SRAM 64K X 16 STANDARD SRAM, 12 ns, PDSO44
5 V 64K X 16 CMOS SRAM 64K X 16 STANDARD SRAM, 20 ns, PDSO44
5 V 64K X 16 CMOS SRAM 64K X 16 STANDARD SRAM, 10 ns, PDSO44
High Speed CMOS Logic Dual Positive-Edge-Triggered J-K Flip-Flops with Set and Reset 16-PDIP -55 to 125
High Speed CMOS Logic Triple 3-Input AND Gates 14-PDIP -55 to 125
High Speed CMOS Logic Dual Positive-Edge-Triggered J-K Flip-Flops with Set and Reset 16-SOIC -55 to 125
SRAM - 5V Fast Asynchronous
|
Analog Devices, Inc.
Alliance Semiconductor, Corp.
ALSC[Alliance Semiconductor Corporation]
|
| HCS109HMSR HCS109KMSR FN2466 HCS109MS HCS109D HCS1 |
Radiation Hardened Dual JK Flip Flop HC/UH SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16
Radiation Hardened Dual JK Flip Flop(抗辐射双J-K触发 辐射加固JK触发器拖鞋（抗辐射双JK触发器）
From old datasheet system
Flip Flop, JK, Dual, Rad-Hard, High-Speed, CMOS, Logic
|
Intersil, Corp.
INTERSIL[Intersil Corporation]
|
| ACTS74HMSR-02 |
Dual D Type Flip Flop with Set and Reset, Advanced Logic, CMOS; Temperature Range: -55°C to 125°C; Package: Die (Military Visual) ACT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, UUC14
|
Intersil, Corp.
|
| 74AUP1G80GW 74AUP1G80GM 74AUP1G80GN |
Low-power D-type flip-flop; positive edge trigger 低功耗D型触发器;上升沿触
Low-power D-type flip-flop; positive edge trigger AUP/ULP/V SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, INVERTED OUTPUT, PDSO6
|
NXP Semiconductors N.V.
|
| HM6264AFP-10 HM6264AFP-10T HM6264AFP-12 HM6264AFP- |
3-Line To 8-Line Decoders/Demultiplexers 16-CFP -55 to 125 8192字8位高速CMOS静态RAM
Dual 4-Input Positive-NAND 50-Ohm Line Drivers 14-CFP -55 to 125 8192字8位高速CMOS静态RAM
3-Line To 8-Line Decoders/Demultiplexers 16-CDIP -55 to 125 8192字8位高速CMOS静态RAM
Dual 2-Line To 4-Line Decoders/Demultiplexers 16-CDIP -55 to 125 8192字8位高速CMOS静态RAM
8192-word x 8-bit High Speed CMOS Static RAM 8192字8位高速CMOS静态RAM
Quadruple 2-Input Positive-NAND Schmitt Triggers 20-LCCC -55 to 125 8192字8位高速CMOS静态RAM
Dual 4-Input Positive-NAND 50-Ohm Line Drivers 14-CDIP -55 to 125 8192字8位高速CMOS静态RAM
Dual Voltage-Controlled Oscillators 16-CDIP -55 to 125
Quadruple 2-Input Positive-NAND Schmitt Triggers 14-CDIP -55 to 125
Dual J-K Negative-Edge-Triggered Flip-Flops With Preset And Clear 16-CFP -55 to 125
|
http://
HITACHI[Hitachi Semiconductor]
Hitachi,Ltd.
|
| SN74LS109A-D |
Dual JK Positive Edge-Triggered Flip-Flop
|
ON Semiconductor
|
